The Saxo is based around two chips: the FX2, which is an 8051-based USB-2 device and an Altera Cyclone FPGA. Linux work with the FX2 is best done using the sdcc cross compiler (available on Debian Linux; but only the non-free sdcc-nf package supports the 8051 architecture) coupled with Wolfgang Wieser's toolset, most importantly cycfx2prog (at least version 0.46) and usb-fx2-local-examples (you need at least the include files).
All of the usb-fx2-local-examples work unmodified on the Saxo, since they just use the FX2 without the FPGA. To use the FPGA, you'll also need saxo_loader. Unpack the program into to same directory you unpacked usb-fx2-local-examples, cross-compile it using make/sdcc, then boot load it over USB using cycfx2prog. Upon initialization, it resets the FPGA and places it into its Passive Serial configuration mode. Anything received by bulk transfer over endpoint 1 (which should be an Altera .rbf file) is then clocked out to the FPGA's configuration pins. It also puts endpoints 2, 4, 6, and 8 into the default configuration documented in the Saxo manual, which presents them as FIFO buffers to the FPGA. It has been tested with the LEDblink, LEDglow, FX2_LEDs, and FX2_bidir examples from the Saxo Startup Kit.
The code does not (directly) support programming the Saxo's EEPROMs. Doing so would require loading an FPGA bitfile that implemented an I2C controller (to program the FX2's optional EEPROM) and/or something to implement Altera's EPCS protocol (to program the FPGA's EEPROM). This should be doable with little modification to saxo_loader. However, to load the FPGA from its EEPROM, the program would have to be modified to put the FPGA into Active Serial configuration mode upon startup. See the source code for more detail.
The code is covered under version 2 of the GNU General Public License.
(FX2_bidir_SaxoXylo.rbf is from the Saxo Startup Kit)
cycfx2prog prg:saxo_loader.ihx run fbulk:1,FX2_bidir_SaxoXylo.rbf cycfx2prog "sbulk:2,This is a test" cycfx2prog dbulk:6,-512
FX2_bidir_SaxoXylo programs the FPGA to count characters, so the last command should return a character count of 0x0e.